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Title: Schematic of silicon nanowire
Description: In this schematic image, a silicon nanowire is shown surrounded by a stack of thin layers of material called dielectrics, which store electrical charge. NIST scientists determined the best arrangement for this dielectric stack for the optimal construction of silicon nanowire-based memory devices.

See also http://www.nist.gov/pml/semiconductor/nanowire-052411.cfm.
Subjects (names):
Topics/Categories: Nanotechnology--Materials
Type: Graphic/illustration
Source: National Institute of Standards and Technology
Credit Line as it should
appear in print:
Zhu, GMU
AV Number: 11PML050
Date Created: 2011
Date Entered: 5/18/2011

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