What is claimed is:
1. A method of fabricating atomically precise structures of non-monocrystalline material, comprising the steps of:
providing a monocrystalline substrate;
etching said monocrystalline substrate to define recessed patterns for the formation of desired members of said non-monocrystalline material;
filling said recessed patterns with said non-monocrystalline material; and
removing the monocrystalline material around said filled recessed patterns, such that members conforming to said patterns and formed of said non-monocrystalline material remain.
2. The method of claim 1, comprising the further step of forming an insulative layer below the surface of said substrate prior to said step of etching said substrate to define said recessed patterns.
3. The method of claim 2, wherein said insulative layer forms the base of said recessed patterns in said monocrystalline material.
4. The method of claim 2, comprising the further step of removing a portion of said substrate and said insulative layer beneath said members of non-monocrystalline material.
5. The method of claim 1, wherein said patterns etched in said monocrystalline substrate are patterned such that said non-monocrystalline material defines a reference grid.
6. The method of claim 5, wherein said reference grid comprises concentric quadrilaterals having parallel members for calibrating optical instruments employed for positional measurements.
7. The method of claim 6, wherein said monocrystalline substrate is patterned to define a reference grid comprising concentric quadrilaterals by disposition of photolithographic masks on said layer, said masks including intersecting elongated apertures corresponding to the desired locations of said parallel members, and wherein the elongated apertures corresponding to the parallel members of each concentric quadrilateral extend beyond their intersections, to ensure that the intersecting parallel members of the quadrilaterals form complete corners, but do not intersect the apertures corresponding to others of said concentric quadrilaterals.
8. A method of forming a test structure for measurement of features formed thereon, comprising the steps of:
providing a monocrystalline substrate of a material exhibiting preferential etching, such that said material is etched away along certain crystal orientations, but not others, when processed according to a known etching process;
forming an insulative layer within said monocrystalline substrate without disturbing the monocrystalline nature thereof, and exposing a monocrystalline surface;
disposing a mask resistant to said known etching process on said exposed monocrystalline surface, said mask defining a predetermined pattern;
processing said surface having said mask thereon according to said known etching process; and
removing said mask;
whereby a monocrystalline patterned conductor exhibiting features selected to permit measurement of geometrical characteristics of conductive members of said monocrystalline material is formed on the exposed surfaces;
wherein said mask disposed over said monocrystalline surface layer is patterned such that said patterned conductor defines an elongated conductor and a plurality of taps intersecting said elongated conductor, in order to enable measurement of the width of said elongated conductor by passing a current therethrough and measuring voltage drops therealong.
9. The method of claim 8, wherein said step of forming an insulative layer within said monocrystalline substrate without disturbing the monocrystalline nature thereof, and exposing a monocrystalline surface, is performed by implantation of oxygen atoms into a monocrystalline silicon substrate, and annealing said substrate, such that an insulative layer of SiO.sub.2 is formed in situ.
10. The method of claim 9, comprising the further step of removing a portion of said substrate beneath said pattern formed in said monocrystalline layer, enabling transmissive optical inspection of said pattern through said SiO.sub.2 insulative layer.
11. The method of claim 8, wherein said taps intersect said elongated conductor at angles corresponding to the orientation of the respective crystal planes of said monocrystalline material.
12. The method of claim 11, wherein said monocrystalline layer is silicon having an <110> upper surface, said elongated conductor extends in the <112> direction, side walls of said elongated conductor are oriented at 90.degree. with respect to flat upper surfaces of said conductor, and said taps intersect said elongated conductor at angles substantially equal to 109.48.degree..
13. The method of claim 11, wherein said silicon monocrystalline layer is silicon having an <100> upper surface, said elongated conductor extends in the <110> direction, side walls of said elongated conductor are oriented at substantially 54.75.degree. with respect to flat upper surfaces of said conductor, and said taps intersect said elongated conductor at angles substantially equal to 90.degree..
14. A method of calibrating measurements of geometrical characteristics of a conductive member formed over an insulating layer on a substrate, comprising the steps of:
providing an insulative layer on a substrate;
providing a monocrystalline layer of a material exhibiting preferential etching, such that said material is etched away along certain crystal orientations, but not others, when exposed to a known etching process, over said insulative layer;
disposing a mask resistant to said known etching process on said exposed surface, said mask defining a predetermined pattern;
exposing said surface having said mask thereon to said known etching process, whereby a patterned conductor is formed on the exposed surface thereof;
making an electrical measurement of a geometrical characteristic of said patterned conductor;
making a measurement of the same geometrical characteristic of said patterned conductor using a non-electrical technique; and
comparing said measurements to calibrate the instruments employed to make said measurements.
15. The method of claim 14, wherein said step of making an
electrical measurement of a geometrical characteristic of said patterned conductor is performed by:
passing a current along said patterned conductor;
measuring a voltage drop between specified points therealong; and
determining the width of said conductor responsive to said measured voltage drop.
16. The method of claim 15, wherein said step of providing an insulative layer on a substrate is performed by implantation of oxygen atoms into a monocrystalline silicon substrate, such that an insulative layer of SiO.sub.2 is formed in situ.
17. The method of claim 16, comprising the further step of removing a portion of said substrate beneath said pattern formed in said monocrystalline layer, and wherein said step of making a measurement of a geometrical characteristic of said patterned conductor using a non-electrical technique is performed by transmissive optical inspection of said pattern through said SiO.sub.2 insulative layer.
18. The method of claim 14, wherein said step of making a measurement of a geometrical characteristic of said patterned conductor using a non-electrical technique is performed by a techniques selected from the group including scanning probe microscopy, scanning capacitance, or current-forcing techniques.
19. The method of claim 14, comprising the further step of removing a portion from said substrate beneath said pattern formed in said monocrystalline layer, and wherein said step of making an electrical measurement of a geometrical characteristic of said patterned conductor is performed by measuring the capacitance between a portion of the conductor formed of the monocrystalline material and a conductive member on the opposite side of said insulative layer therefrom.
20. The method of claim 14, wherein said monocrystalline layer is patterned to define an elongated conductor and a plurality of taps intersecting said elongated conductor, in order to enable measurement of the width of said elongated conductor by passing a current therethrough and measuring the voltage drop therealong.
21. The method of claim 20,